Constrained Hopfield neural network for real-time predictive control

Author

Quero, J.M. ; Janer, C.L. ; Franquelo, L.G.

Author_Institution

Dipartimento de Ingenieria de Sistemas y Autom., Seville Univ., Spain

Volume

3

fYear

1994

fDate

5-9 Sep 1994

Firstpage

1727

Abstract

The hardware implementation of an optimization network with restrictions to perform real-time generalized predictive control (GPC) is described. The use of a space-efficient stochastic architecture allows a realization on a programmable logic device. As a result a programmable neural chip coprocessor that solves optimization problems subject to restrictions has been developed. Expressions for network parameters are provided to implement GPC. An adaptive controller is achieved using RAM memories to store the network parameters. Experimental results from a simple implementation of the controller are included

Keywords

Hopfield neural nets; coprocessors; neural chips; neural net architecture; optimisation; predictive control; process control; real-time systems; RAM memories; adaptive controller; constrained Hopfield neural network; hardware implementation; optimization network; optimization problems; programmable logic device; programmable neural chip coprocessor; real-time generalized predictive control; space-efficient stochastic architecture; Artificial neural networks; Computer networks; Constraint optimization; Coprocessors; Cost function; Hopfield neural networks; Neural network hardware; Neural networks; Predictive control; Stochastic processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Industrial Electronics, Control and Instrumentation, 1994. IECON '94., 20th International Conference on

Conference_Location

Bologna

Print_ISBN

0-7803-1328-3

Type

conf

DOI

10.1109/IECON.1994.398074

Filename

398074