DocumentCode
2664037
Title
A fast RNS Galois field multiplier
Author
Radhakrishnan, Damu ; Yuan, Yong
Author_Institution
Dept. of Electr. Eng., Idaho Univ., Moscow, ID, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
2909
Abstract
An approach to the design of a fast residue-number-system (RNS)-based multiplier over a Galois field GF (p ), where p is a prime number, is presented. This design uses an isomorphic mapping from the additive index group, modulo (p -1,), of GF (p ) onto a set of submodular additive groups. The submoduli are selected for minimizing the hardware and increasing the speed. This is accomplished by fully exploiting the properties of a Galois field. This multiplier is faster and uses less silicon area than previously published designs
Keywords
digital arithmetic; multiplying circuits; Galois field multiplier; additive index group; fast residue-number-system; isomorphic mapping; prime number; silicon area; submodular additive groups; Additives; Application software; Digital arithmetic; Galois fields; Hardware; Parallel processing; Read only memory; Real time systems; Silicon; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112619
Filename
112619
Link To Document