DocumentCode
2664139
Title
Efficient Function Mapping in Nanoscale Crossbar Architecture
Author
Yang, Joon-Sung ; Datta, Rudrajit
Author_Institution
Comput. Eng. Res. Center, Univ. of Texas at Austin, Austin, TX, USA
fYear
2011
fDate
3-5 Oct. 2011
Firstpage
190
Lastpage
196
Abstract
Nanoscale crossbar architectures have been proposed as viable alternatives for overcoming the fundamental physical limitations of CMOS technology. However due to the manufacturing processes for Nan fabrication and their smaller feature sizes, defect densities are higher. This paper presents an efficient function mapping method in the presence of high defect rates for nanoscale crossbar arrays. Given a function and a defect map that describes fault patterns in the crossbar architecture, the approach described here tries to find a valid function mapping, if one exists, using a matrix representation. A set of constraints are derived to preserve semantics and then Integer Linear Programming (ILP) is used to solve the equations. Experimental results show the proposed approach provides efficient utilization of nanoscale crossbars in mapping functions in presence of high defect rates.
Keywords
integer programming; linear programming; manufacturing processes; matrix algebra; nanoelectronics; nanofabrication; defect map; fault pattern; function mapping; integer linear programming; manufacturing process; matrix representation; nanofabrication; nanoscale crossbar architecture; nanoscale crossbar array; physical limitation; Circuit faults; Computer architecture; Equations; Fault tolerance; Fault tolerant systems; Nanoscale devices; Nanowires;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2011 IEEE International Symposium on
Conference_Location
Vancouver, BC
Print_ISBN
978-1-4577-1713-0
Type
conf
DOI
10.1109/DFT.2011.39
Filename
6104443
Link To Document