SAT-based ATPG for reversible circuits

Reversible circuits, in particular with their application in the domain of quantum computation and low-power design, are seen as promising alternative to conventional circuit technologies. First physical implementations are already available. Hence, researchers started to investigate testing of this kind of circuits. However, so far only simple reversible circuits have been considered. In this paper, we show that automatic test pattern generation of reversible circuits is harder, if additional constraints (like the frequently used constant inputs) occur. As a consequence, we propose an alternative ATPG method that makes use of solvers for Boolean satisfiability (SAT). Experiments demonstrate that with this approach, testsets for reversible circuits can be efficiently generated even if additional constraints like constant inputs have to be considered.