Online Missing/Repeated Gate Faults Detection in Reversible Circuits

Reversible logic is a computation methodology with the promise of possibly zero-energy consumption by elimination of power dissipation due to information loss. Furthermore, reversible logic has direct application in quantum computing. However, since fault models in reversible circuits are fundamentally different from those used for CMOS VLSI technologies, therefore new testing approaches must be developed to test reversible circuits. It has been shown that two new types of faults in the form of gate missing and gate repeating are more likely to occur in reversible circuits, rather than traditional stuck-at faults. In this paper, we present an approach for online detection of these types of faults in reversible circuits. In this approach, we modify reversible gates in such a way that they can produce information on the number of cascaded gates. By using such information we add an appropriate reversible gate to detect missing and repeated gate faults. Simulation results on a set of benchmark circuits confirm that the proposed approach can detect 100% of single and more than 97% of multiple missing/repeated gate faults, in average. Since, the modified gates provide a combination of basic logic operation (e.g. NAND and NOR) in a reversible gate, therefore, using these gates effectively reduces area overhead and the number of garbage outputs, compared to previous work.