DocumentCode :
2665190
Title :
Base resistance and pn junction capacitance extraction on vertical bipolar transistors
Author :
Robinson, M.E. ; Nevárez-Lozano, Horacio ; Ramírez-Angulo, Jaime ; Geiger, Randall L. ; Wang, Peter ; Goff, Larry
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear :
1990
fDate :
1-3 May 1990
Firstpage :
3182
Abstract :
The general concepts of base resistance and pn junction capacitance extraction are discussed. A formulation that can be adopted to extract the base resistance for typical transistor structures is reviewed. A formulation for the calculation of zero-bias space-charge-region capacitances of pn junctions is introduced. A general-purpose bipolar transistor simulator is used to extract both the base resistance and the pn junction capacitances of arbitrarily shaped bipolar transistors based on the formulations. Simulated results are in good agreement with values obtained using high-precision measurement techniques
Keywords :
bipolar transistors; capacitance; semiconductor device models; base resistance; junction capacitance extraction; transistor simulator; vertical bipolar transistors; zero-bias space-charge-region capacitances; Bipolar transistors; Capacitance measurement; Conductivity; Current density; Electric resistance; Electrical resistance measurement; Equations; Frequency; Instruments; Resistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
Type :
conf
DOI :
10.1109/ISCAS.1990.112688
Filename :
112688
Link To Document :
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