DocumentCode
2665477
Title
Job Phasing Aware Preemption Deferral
Author
Marinho, José ; Petters, Stefan M.
Author_Institution
CISTER-ISEP, Polytech. Inst. of Porto, Porto, Portugal
fYear
2011
fDate
24-26 Oct. 2011
Firstpage
128
Lastpage
135
Abstract
Preemptions account for a non-negligible overhead during system execution. There has been substantial amount of research on estimating the delay incurred due to the loss of working sets in the processor state (caches, registers, TLBs) and some on avoiding preemptions, or limiting the preemption cost. We present an algorithm to reduce preemptions by further delaying the start of execution of high priority tasks in fixed priority scheduling. Our approaches take advantage of the floating non-preemptive regions model and exploit the fact that, during the schedule, the relative task phasing will differ from the worst-case scenario in terms of admissible preemption deferral. Furthermore, approximations to reduce the complexity of the proposed approach are presented. Substantial set of experiments demonstrate that the approach and approximations improve over existing work, in particular for the case of high utilisation systems, where savings of up to 22% on the number of preemption are attained.
Keywords
computational complexity; delay estimation; processor scheduling; task analysis; complexity reduction; delay estimation; fixed priority scheduling; floating nonpreemptive region model; high priority task execution; job phasing aware preemption deferral; nonnegligible overhead; preemption reduction; processor state; system execution; Approximation methods; Complexity theory; Delay; Equations; Mathematical model; Processor scheduling; Schedules;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded and Ubiquitous Computing (EUC), 2011 IFIP 9th International Conference on
Conference_Location
Melbourne, VIC
Print_ISBN
978-1-4577-1822-9
Type
conf
DOI
10.1109/EUC.2011.46
Filename
6104517
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