DocumentCode
2665762
Title
Source compensation scheme for reducing impact of variability on differential amplifier in 35nm CMOS
Author
Hong, Feng ; Cumming, David R S
Author_Institution
Dept. of Electron. & Electr. Eng., Univ. of Glasgow, Glasgow, UK
fYear
2010
fDate
12-15 Dec. 2010
Firstpage
339
Lastpage
342
Abstract
Variability introduced by intrinsic parameter fluctuations has a great impact on the mismatch performance of nominally identical transistors. We have studied the impact of extreme device variability on the mismatch performance of a differential amplifier by developing an analytical model validated against a detailed 35 nm gate-length MOSFET model set. A novel source compensation concept for minimizing the effects of impact is introduced, and a circuit implementation of the scheme is presented that reduces the standard deviation of the mismatch characteristics by 79%.
Keywords
CMOS analogue integrated circuits; MOSFET; compensation; differential amplifiers; CMOS transistor; MOSFET model; differential amplifier; size 35 nm; source compensation scheme; variability impact reduction; CMOS integrated circuits; Integrated circuit modeling; Logic gates; Variable speed drives;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location
Athens
Print_ISBN
978-1-4244-8155-2
Type
conf
DOI
10.1109/ICECS.2010.5724522
Filename
5724522
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