DocumentCode :
2666055
Title :
Physical design tradeoffs in power distribution networks for 3-D ICs
Author :
Tsioutsios, Ioannis ; Pavlidis, Vasilis F. ; De Micheli, Giovanni
Author_Institution :
Integrated Syst. Lab., EPFL, Lausanne, Switzerland
fYear :
2010
fDate :
12-15 Dec. 2010
Firstpage :
430
Lastpage :
433
Abstract :
A physical model for the design of the power distribution networks in three-dimensional integrated circuits is proposed. The tradeoffs among the different design parameters are specified and analyzed. Different case studies are explored, indicating that smaller and denser TSVs can deliver power more efficiently as compared to larger and coarsely distributed TSVs. The interplay between the TSV count and the intra-plane power distribution network in reducing the power supply noise is also shown.
Keywords :
integrated circuit design; integrated circuit noise; low-power electronics; power supply circuits; three-dimensional integrated circuits; 3D IC; TSV count; intra-plane power distribution network; power distribution network design; power supply noise; three-dimensional integrated circuit; through silicon vias; Performance evaluation; 3-D Integrated Circuits; Power Distribution Networks; Through Silicon Vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location :
Athens
Print_ISBN :
978-1-4244-8155-2
Type :
conf
DOI :
10.1109/ICECS.2010.5724541
Filename :
5724541
Link To Document :
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