Accumulation of random noise in a chain of slave clocks

This paper considers random noise accumulation in a chain of clocks using a time-domain, state-space approach. In this configuration, the output phase signal of one clock is the input phase signal to the next clock. The problem is relevant to synchronization distribution is SONET and SDH networks. Both linear and nonlinear phase-locked loop models with additive noise sources are considered. For the latter, the particular nonlinearity considered is phase detector quantization. Simulation results for time variance (TVAR) are obtained in all cases. Explicit analytic results for the asymptotic behavior of TVAR are obtained for the linear case. For short time intervals, TVAR is proportional to time interval and is independent of the number of clocks in the chain and the quantization size. In addition, for short time intervals TVAR increases with the square of bandwidth for phase detector white phase modulation and is independent of bandwidth for VCO white phase modulation and white frequency modulation. For long time intervals, TVAR is inversely proportional to time interval for phase detector white phase modulation and inversely proportional to the square of time interval for VCO white phase modulation and white frequency modulation. In addition, for long time intervals TVAR increases with the number of clocks in the chain; the increase is linear for phase detector white phase modulation and VCO white frequency modulation. Finally, for long time intervals TVAR increases when phase detector quantization is introduced and as the quantization size is increased, for the uniform phase detector quantization considered here