DocumentCode :
2666613
Title :
A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators
Author :
Jiang, Yang ; Wong, Kim-Fai ; Cai, Chen-Yan ; Sin, Sai-Weng ; Seng-Pan, U. ; Martins, Rui P.
Author_Institution :
Analog & Mixed-Signal VLSI Lab., Univ. of Macau, Macau, China
fYear :
2010
fDate :
12-15 Dec. 2010
Firstpage :
547
Lastpage :
550
Abstract :
A novel fixed-Pulse Shape (PS) clock-jitter insensitive Return-to-Zero (RZ) feedback technique in CT ΣΔ modulators is presented. This technique offers a method to reduce the clock-jitter effect in feedback DAC. A switched-RC network and a zero-crossing detector are applied to generate jitter insensitive feedback pulse. This technique was verified in a designed 2nd order CT ΣΔ modulator. A stable 64dB SNDR was obtained with the clock-jitter effect of 2% of a clock cycle. Simulation results show that using the proposed technique, an SNDR improvement up to 30dB can be achieved comparing with traditional RZ DAC.
Keywords :
RC circuits; circuit feedback; digital-analogue conversion; jitter; sigma-delta modulation; clock-jitter sensitivity; continuous-time sigma-delta modulators; feedback DAC; fixed-pulse shape feedback technique; return-to-zero feedback; switched-RC network; zero-crossing detector; Clocks; Switches; World Wide Web; Clock-jitter; RC discharge; continuous-time sigma-delta modulator; fixed-pulse shape feedback; zero-crossing detector;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location :
Athens
Print_ISBN :
978-1-4244-8155-2
Type :
conf
DOI :
10.1109/ICECS.2010.5724570
Filename :
5724570
Link To Document :
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