An ultra low power 9-bit 1-MS/s pipelined SAR ADC for bio-medical applications

Author

Yin, Guohe ; Chio, U-Fat ; Wei, He-Gong ; Sin, Sai-Weng ; Seng-Pan, U. ; Martins, Rui Paulo ; Wang, ZhiHua

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2010

fDate

12-15 Dec. 2010

Firstpage

878

Lastpage

881

Abstract

This paper presents a pipelined successive approximation register analog-to-digital converter (SAR ADC) for bio-medical applications based on 65 nm CMOS technology. Without using op-amp, the proposed 9-bit pipelined SAR ADC can reduce the capacitance from 512C to 64C. The pipelined architecture can enhance the operation efficiency of the ADC and also save the digital power consumption in the SAR. The simulation results show that the total power of the ADC is 10.26 μW only, and the figure of merit (FOM) of the ADC is 28.3 fJ/conversion-step.

Keywords

CMOS integrated circuits; analogue-digital conversion; biomedical electronics; low-power electronics; CMOS technology; analog-digital converter; biomedical applications; digital power consumption; figure of merit; pipelined SAR ADC; size 65 nm; successive approximation register; ultralow power ADC; word length 9 bit; Variable speed drives; SAR ADC; bio-medical applications; pipelined; ultra-low power;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Conference_Location

Athens

Print_ISBN

978-1-4244-8155-2

Type

conf

DOI

10.1109/ICECS.2010.5724652

Filename

5724652