Title :
Comparison of addition structures synthesis over commercial FPGAs
Author :
Sacristán, Miguel A. ; Rodellar, Victoria ; Díaz, Antonio
Author_Institution :
DATSI, Univ. Politecnica de Madrid
Abstract :
This paper describes the behavior of the synthesis of several adders with different structures: lineal, like ripple carry adder, tree, like carry look ahead; array, like prefix adders; and optimized low level logic over FPGAs. The results of used resources and total delay of the resulting circuit are compared over the commercial families VIRTEX4 and STRATIX2 from Xilinx and Altera manufacturers, respectively
Keywords :
adders; field programmable gate arrays; logic design; STRATIX2; VIRTEX4; addition structures synthesis; carry look ahead; commercial FPGA; field programmable gate arrays; optimized low level logic; prefix adders; ripple carry adder; Adders; Circuit synthesis; Delay; Digital signal processing; Field programmable gate arrays; Logic arrays; Logic functions; Manufacturing; Space technology; Transmission lines;
Conference_Titel :
Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on
Conference_Location :
Tunis
Print_ISBN :
0-7803-9726-6
DOI :
10.1109/DTIS.2006.1708664
