A front end chip development for the SLHC CMS Slicon Strip Tracker

The FEAFS chip has been designed for a super-LHC CMS Silicon Strip Tracker front-end electronics. Its primary function is to find clusters of activated strips for the level 1 trigger. A filtering is done to remove clusters associated with low transverse momentum particles using either a cut on their width and/or a correlation between their positions on two modules. The processing results are sent on a shared link with the readout data to lower the power consumption. The FEAFS chip has been developed in IBM 0.13μm technology. This paper presents the foreseen processing and the design of the chip. Some simulation results are reported.