Title :
Simulation of intrinsic bipolar transistor mechanisms for future capacitor-less eDRAM on bulk substrate
Author :
Pulicani, R. ; Goducheau, O. ; Degoirat, H. ; Aziza, H. ; Perez, A. ; Bergeret, E.
Author_Institution :
STMicroelectronics, Crolles, France
Abstract :
Embedded DRAM technology is undergoing a radical evolution. With size reduction, capacity shrink seems to be a complex obstacle to overcome. Alternative memory cells have been proposed to respond to this problem; capacitorless eDRAM is one of most promising solution. In this paper, after reviewing the current status on eDRAM market and recent evolution of eDRAM trends we study the feasibility of an innovative capacitorless eDRAM based on intrinsic bipolar transistor on bulk substrate.
Keywords :
DRAM chips; bipolar transistors; bulk substrate; capacitor-less eDRAM; capacity shrink; embedded DRAM technology; intrinsic bipolar transistor mechanisms; size reduction; Capacitors; Decoding; Insulators; Junctions; Logic gates; Random access memory; Video equipment; 1T-DRAM; capacitor-less eDRAM; eDRAM;
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location :
Athens
Print_ISBN :
978-1-4244-8155-2
DOI :
10.1109/ICECS.2010.5724674
