A statistical design method for Giga Bit memory arrays and beyond

We have developed a statistical method to assess the robustness of large memory designs to local parameter fluctuations, with dramatically fewer runs than with a Monte-Carlo approach. The method is applicable to the study of any monotonic electrical response of independent and normally distributed variables, which actually covers many practical design cases. It allows accurate identification of the worst-case combinations of parameters for such responses, i.e. the set of parameters minimizing or maximizing the response. After presenting the theoretical aspects of the method, we show the example of the signal margin study of a 1Gb Z-RAM® floating body memory design, taking into account cell and sense-amplifier fluctuations through TCAD and SPICE simulations.