Title :
Analyzing the memory effect of resistive open in CMOS random logic
Author :
Renovell, M. ; Comte, M. ; Polian, I. ; Engelke, P. ; Becker, B.
Author_Institution :
LIRMM-UMR C5506 CNRS, Montpellier
Abstract :
This paper analyzes the electrical behaviour of resistive opens as a function of its unpredictable resistance. It is demonstrated that the electrical behaviour depends on the value of the open resistance. It is also shown that, due to the memory effect detection of the open by a given vector Ti depends on all the vectors that have been applied to the circuit before Ti. An electrical analysis of this memory effect is presented
Keywords :
CMOS logic circuits; integrated circuit testing; logic testing; CMOS random logic; electrical analysis; electrical behaviour; memory effect detection; open resistance; unpredictable resistance; CMOS logic circuits; Central Processing Unit; Circuit faults; Circuit simulation; Circuit testing; Electric resistance; Integrated circuit modeling; Logic testing; Manufacturing processes; Voltage;
Conference_Titel :
Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on
Conference_Location :
Tunis
Print_ISBN :
0-7803-9726-6
DOI :
10.1109/DTIS.2006.1708691
