DocumentCode
2669449
Title
DFTT: Design for Trojan Test
Author
Jin, Yier ; Kupp, Nathan ; Makris, Yiorgos
Author_Institution
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
fYear
2010
fDate
12-15 Dec. 2010
Firstpage
1168
Lastpage
1171
Abstract
Due to the globalization of the Integrated Circuit (IC) manufacturing industry, hardware Trojans constitute an increasingly probable threat to both commercial and military applications. As traditional testing methods fall short in finding hardware Trojans, several specialized detection methods have surfaced. To facilitate research in this area and embed internal barriers to prevent Trojan attacks both at the design level and at the manufacturing level, we propose a Design-for-Trojan-Test (DFTT) methodology. DFTT is based on one key principle: increase the complexity for hardware Trojan attackers, thereby making successful hardware Trojan-based attacks extremely difficult to accomplish. A DFTT tool is also developed to automate the hardening process. The effectiveness of our Trojan prevention method is demonstrated on the Trivium encryption core.
Keywords
design for testability; integrated circuit manufacture; integrated circuit testing; invasive software; Trivium encryption core; design-for-Trojan-test methodology; hardening process; hardware Trojan attackers; integrated circuit manufacturing industry; Cryptography; Hardware; Trojan horses;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location
Athens
Print_ISBN
978-1-4244-8155-2
Type
conf
DOI
10.1109/ICECS.2010.5724725
Filename
5724725
Link To Document