DocumentCode :
2669465
Title :
Ground bounce modelling for digital gigascale integrated circuits
Author :
Pons, M. ; Martorell, F. ; Aragones, X. ; Moll, F. ; Rubio, A.
Author_Institution :
Dept. of Electron. Eng., UPC, Barcelona
fYear :
2006
fDate :
5-7 Sept. 2006
Firstpage :
305
Lastpage :
309
Abstract :
In the paper an analytical model for ground bounce noise taking into account the interdependence between switching current and noise voltage is presented. The model shows the discrepancies from general accepted assumption of independence between the two variables. Noise calculations using the independence assumption cause an overestimation of the noise levels. The results are verified through realistic simulations and for different technology nodes
Keywords :
digital integrated circuits; integrated circuit modelling; integrated circuit noise; digital integrated circuits; gigascale circuits; ground bounce noise; integrated circuit modelling; power supply noise; switching current; Circuit noise; Circuit simulation; Digital circuits; Digital integrated circuits; Integrated circuit modeling; Integrated circuit noise; Noise level; Power supplies; Switching circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on
Conference_Location :
Tunis
Print_ISBN :
0-7803-9726-6
Type :
conf
DOI :
10.1109/DTIS.2006.1708724
Filename :
1708724
Link To Document :
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