A new methodology for accurate predictive robustness analysis of designs implemented in SRAM-based FPGAs

An increasing number of applications rely on embedded systems for a correct behavior or user interaction. Many of these systems are today considered critical (for safety, security ... or just for competitiveness), but cannot be expensive and often need flexibility. SRAM-based FPGAs are good candidates to implement such systems but their main disadvantage is their relatively high probability of application failure due to environmental or malicious perturbations. We propose in this paper a new approach to accurately evaluate the probability of application failure when errors occur in the configuration SRAM. The approach is based on a database created from field data and used to evaluate at design time the robustness of a given circuit without resorting to costly equipments such as lasers or particle beams.