DocumentCode :
2669823
Title :
Session 3A: Circuit Design Verification
fYear :
2006
fDate :
5-7 Sept. 2006
Firstpage :
84
Lastpage :
84
Abstract :
Start of Session 3A: Circuit Design Verification.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on
Conference_Location :
Tunis
Print_ISBN :
0-7803-9726-6
Type :
conf
DOI :
10.1109/DTIS.2006.1708747
Filename :
1708747
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2669823
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