• DocumentCode
    2670509
  • Title

    Three bits per cell floating gate NAND flash memory technology for 30nm and beyond

  • Author

    Nitta, H. ; Kamigaichi, T. ; Arai, F. ; Futatsuyama, T. ; Endo, M. ; Nishihara, N. ; Murata, T. ; Takekida, H. ; Izumi, T. ; Uchida, K. ; Maruyama, T. ; Kawabata, I. ; Suyama, Y. ; Sato, A. ; Ueno, K. ; Takeshita, H. ; Joko, Y. ; Watanabe, S. ; Liu, Y. ;

  • Author_Institution
    Toshiba Corp., Yokohama, Japan
  • fYear
    2009
  • fDate
    26-30 April 2009
  • Firstpage
    307
  • Lastpage
    310
  • Abstract
    Three bits per cell NAND Flash Memory Technology for 30 nm and beyond has been successfully developed with floating gate technology. Tight natural Vth distribution, wide program/erase window, and good cell reliability such as program disturb, endurance and data retention are obtained. 8 level Vth distributions are successfully demonstrated.
  • Keywords
    NAND circuits; flash memories; logic gates; nanoelectronics; reliability; NAND flash memory technology; cell reliability; data retention; floating gate technology; size 30 nm; Dielectric constant; Digital audio players; Digital cameras; Displays; Electrodes; Nonvolatile memory; Silicides; Silicon compounds; Solid state circuits; Space technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2009 IEEE International
  • Conference_Location
    Montreal, QC
  • ISSN
    1541-7026
  • Print_ISBN
    978-1-4244-2888-5
  • Electronic_ISBN
    1541-7026
  • Type

    conf

  • DOI
    10.1109/IRPS.2009.5173269
  • Filename
    5173269
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2670509