Fast shape decoding for MPEG-4 video

Author

Thinakaran, Jagan ; Ho, Duan-Juat ; Ling, Nam

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

fYear

2000

fDate

2000

Firstpage

110

Lastpage

119

Abstract

To achieve fast shape decoding in MPEG-4, it is necessary to have a high speed binary shape decoder. A fast architecture is presented here that is able to decode up to 72.4 Mpixels/s, meeting up to MPEG-4 Main Profile @ Level 3 real time requirement. High performance is achieved by using a lookahead scheme in the probability generation unit and a fast ALU. Simpler shift registers are used in place of large barrel shifters to reduce the area. Furthermore, even with the use of low power synchronous ROM it is still possible to decode one bit (shape pixel) every clock cycle. The architecture is synthesized using Avanti´s Passport 0.35 μm technology library. The layout of the module is shown and the die area is 2.56 mm²

Keywords

VLSI; circuit CAD; code standards; decoding; digital signal processing chips; integrated circuit design; telecommunication standards; video coding; 0.35 mum; Avanti Passport library; CAD; MPEG-4 video; Main Profile @ Level 3; VLSI module; fast ALU; fast architecture; fast shape decoding; high speed binary shape decoder; lookahead scheme; low power synchronous ROM; module layout; probability generation unit; shape pixel; shift registers; Arithmetic; Computational complexity; Decoding; Digital TV; Image coding; MPEG 4 Standard; Shape; Shift registers; Very large scale integration; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 2000. SiPS 2000. 2000 IEEE Workshop on

Conference_Location

Lafayette, LA

ISSN

1520-6130

Print_ISBN

0-7803-6488-0

Type

conf

DOI

10.1109/SIPS.2000.886709

Filename

886709