Hot carrier stress degradation modes in p-type high voltage LDMOS transistors

Author

Enichlmair, H. ; Park, J.M. ; Carniello, S. ; Loeffler, B. ; Minixhofer, R. ; Levy, M.

Author_Institution

Process Dev. & Implementation Dept., Austriamicrosystems AG, Unterpremstaetten, Austria

fYear

2009

fDate

26-30 April 2009

Firstpage

426

Lastpage

431

Abstract

The hot carrier stress induced device degradation of a p-type LDMOS high voltage transistor is investigated at different stress conditions. The influence of shallow trench corner rounding and carbon ion implantation into the shallow trench region is discussed. Numerical device simulations, charge pumping measurements and electrical characterisations are used for these investigations.

Keywords

MOSFET; hot carriers; ion implantation; numerical analysis; stress analysis; carbon ion implantation; charge pumping measurement; electrical characterisation; hot carrier stress degradation modes; numerical device simulation; p-type high voltage LDMOS transistors; shallow trench corner rounding; Charge measurement; Charge pumps; Current measurement; Degradation; Electric variables measurement; Hot carriers; Ion implantation; Numerical simulation; Stress; Voltage; NBTI; STI; charge pumping; high-voltage; hot carrier; p-type LDMOS;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2009 IEEE International

Conference_Location

Montreal, QC

ISSN

1541-7026

Print_ISBN

978-1-4244-2888-5

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2009.5173291

Filename

5173291