DocumentCode

2671837

Title

A heuristic for decomposition in multi-level logic optimization

Author

Singh, Vinaya Kumar ; Diwan, A.A.

Author_Institution

ASIC Technologies Pvt. Ltd.

fYear

1993

fDate

3-6 Jan 1993

Firstpage

5

Lastpage

8

Keywords

Boolean functions; Computer networks; Costs; Logic; Network synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 1993. Proceedings. The Sixth International Conference on

ISSN

1063-9667

Print_ISBN

0-8186-3180-5

Type

conf

DOI

10.1109/ICVD.1993.669622

Filename

669622