DocumentCode
2671921
Title
An Application of 16-Valued Logic to Design of Reconfigurable Logic Arrays
Author
Sasao, Tsutomu
Author_Institution
Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Iizuka
fYear
2007
fDate
13-16 May 2007
Firstpage
40
Lastpage
40
Abstract
This paper presents a method to implement a reconfigurable logic array by using FPGA. 16-valued logic is introduced to design circuits with 2-valued 4-input LUTs. Symmetric functions and adders can be efficiently represented, as well as benchmark functions. Comparisons with 2-valued expressions and 4-valued expressions are done. Both sum-of-products expressions and EXOR sum-of-products expressions of 16-valued logic significantly reduces needed FPGA resources.
Keywords
field programmable gate arrays; logic design; EXOR sum-of-products expressions; FPGA; adders; reconfigurable logic arrays; Cams; Field programmable gate arrays; Integrated circuit interconnections; Logic arrays; Logic circuits; Logic design; Programmable logic arrays; Reconfigurable logic; Strontium; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 2007. ISMVL 2007. 37th International Symposium on
Conference_Location
Oslo
ISSN
0195-623X
Print_ISBN
0-7695-2831-7
Type
conf
DOI
10.1109/ISMVL.2007.7
Filename
4215963
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