Title :
The driver/receiver conflict problem in interconnect testing with boundary-scan
Author_Institution :
Vertex Semiconductor, San Jose, CA, USA
Abstract :
This paper explores the driver/receiver conflict problem in interconnect testing with bidirectional pins and 3-state output pins in boundary-scan. The objective is to have a higher-level (higher than chip) designer be aware of this conflict. Some existing algorithms are reviewed
Keywords :
boundary scan testing; design for testability; multichip modules; printed circuit accessories; MCM; PC interconnects; bidirectional pins; boundary-scan; driver/receiver conflict; interconnect testing; Driver circuits; Integrated circuit interconnections; Logic; Pins; Testing;
Conference_Titel :
Test Symposium, 1993., Proceedings of the Second Asian
Conference_Location :
Beijing
Print_ISBN :
0-8186-3930-X
DOI :
10.1109/ATS.1993.398806