DocumentCode
2672034
Title
Design and implementation of a JTAG boundary-scan interface controller
Author
Shen Xu Baang ; Liang Song Hai
Author_Institution
ShaanXi Microelectron. Res. Inst.
fYear
1993
fDate
16-18 Nov 1993
Firstpage
215
Lastpage
218
Abstract
In this paper we present an architecture for JTAG boundary-scan interface controller which we have implemented as a basic RISC microprocessor chip. We also present a JTAG test language which makes the interface between machine and users very friendly
Keywords
automatic test equipment; automatic test software; boundary scan testing; microcontrollers; reduced instruction set computing; user interfaces; JTAG boundary-scan interface controller; RISC microprocessor chip; architecture; logic structure; test language; user interface; Clocks; Instruments; Integrated circuit testing; Logic testing; Microelectronics; Microprocessor chips; Probes; Reduced instruction set computing; System testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1993., Proceedings of the Second Asian
Conference_Location
Beijing
Print_ISBN
0-8186-3930-X
Type
conf
DOI
10.1109/ATS.1993.398807
Filename
398807
Link To Document