Applying the universal recovery equation for fast wafer level reliability monitoring NBTI assessment

Author

Vollertsen, R.-P. ; Reisinger, H. ; Aresu, S. ; Schlünder, C.

Author_Institution

Infineon Technol. AG, IFAG ETS RPA REL, Munich, Germany

fYear

2009

fDate

26-30 April 2009

Firstpage

981

Lastpage

987

Abstract

This work demonstrates that NBTI assessment by fast wafer level reliability methods is possible in a quantitative manner. This involves excluding time periods from the stress time that are used for restoration of damage recovered during stress interruption and a calibrated back extrapolation of measured recovery traces to short delay times based on the universal recovery equation. The development of the methodology, the challenges and the verification of the implemented algorithm are presented.

Keywords

CMOS integrated circuits; extrapolation; integrated circuit reliability; integrated circuit testing; CMOS technology; NBTI; calibrated back extrapolation; damage restoration; universal recovery equation; wafer level reliability; Degradation; Delay; Equations; Monitoring; Niobium compounds; Plasma temperature; Stress measurement; Testing; Thermal stresses; Titanium compounds; NBTI; PFET reliability; SIS; Vt measurement; fWLR; recovery; test methods; universal revovery equation;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2009 IEEE International

Conference_Location

Montreal, QC

ISSN

1541-7026

Print_ISBN

978-1-4244-2888-5

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2009.5173395

Filename

5173395