Abstract :
After 35 years of scaling CMOS, today silicon devices´ power dissipation is limiting the performance across the entire spectrum of computing platforms from handheld consumer devices to workstations, and to mainframes and high performance computers (HPC). While the tradeoff between power and performance is well recognized, most recent studies focus on either low-power, low-performance systems or high-power, high-performance systems. The IBM Blue Gene HPC platform started a trend by concentrating instead on a low power, high performance designs. An order of magnitude improvement in power efficiency can be attained without system performance loss in parallelizable applications those in which such efficiency is most critical. In this talk, solutions for the key components of an HPC are discussed, using the IBM Blue Gene system as a case study to illustrate practical low power directions. From the current petascale HPC systems to the future exascale designs, power reduction will demand even more holistic tradeoffs in device technologies, computer architecture, system software and applications. This talk addresses the fundamental issue of reducing dissipation in the active mode, which is particularly relevant to applications in high performance computing with a high activity factor.
Keywords :
CMOS integrated circuits; computer architecture; low-power electronics; mainframes; parallel machines; power aware computing; CMOS; IBM Blue Gene HPC platform; computer architecture; consumer devices; high performance computers; mainframes; petascale HPC systems; power dissipation; power efficiency; power reduction; silicon devices; system performance; system software;
Conference_Titel :
Green Computing and Communications (GreenCom), 2010 IEEE/ACM Int'l Conference on & Int'l Conference on Cyber, Physical and Social Computing (CPSCom)