A 1 μm CMOS/SOI 64 K SRAM with 10 nA standby current

Author

Houston, T.W. ; Lu, H. ; Mei, P. ; Blake, T.G.W. ; Hite, L.R. ; Sundaresan, R. ; Matloubiam, M. ; Bailey, W.E. ; Liu, J. ; Peterson, A. ; Pollack, G.

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

1989

fDate

3-5 Oct 1989

Firstpage

137

Lastpage

138

Abstract

Summary form only given. The successful design and fabrication of a 64 K SRAM on SIMOX material is discussed. The advantage of the small junction area resulting from mesa isolation is most evident in the very low standby current. An impressively high yield for first-pass material in a research wafer fabrication area was obtained. Aspects of the design relating to the SOI characteristics are discussed and full characterization results are presented

Keywords

CMOS integrated circuits; VLSI; integrated circuit technology; integrated memory circuits; random-access storage; semiconductor technology; semiconductor-insulator boundaries; 1 micron; 10 nA; 64 K SRAM; 64 kbit; CMOS/SOI; SIMOX material; SOI characteristics; Si-SiO₂; characterization results; first-pass material; high yield; low standby current; mesa isolation; research wafer fabrication area; small junction area; CMOS technology; Capacitance; DNA; Fabrication; Power dissipation; Probes; Production; Random access memory; Silicides; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOS/SOI Technology Conference, 1989., 1989 IEEE

Conference_Location

Stateline, NV

Type

conf

DOI

10.1109/SOI.1989.69803

Filename

69803