Reconfigurable architectures for silicon Physical Unclonable Functions

Physical Unclonable Functions (PUFs) are novel circuit primitives which store secret keys in silicon circuits by exploiting uncontrollable randomness due to manufacturing process variations. Previous work has mainly focused on static challenge-response behaviors. However, it has already been shown that a reconfigurable architecture of PUF will not only enable PUFs to meet practical application needs, but also can improve the reliability and security of PUF-based authentication or identification systems. In this paper, we propose several novel structures for non-FPGA reconfigurable silicon PUFs, which do not need any special fabrication methods and can overcome the limitations and drawbacks of FPGA-based techniques. Their performances are quantified by the inter-chip variation, intra-chip variation and reconfigurability tests.