Architectural design tool for low area band matrix LU factorization

An area efficient band matrix design tool is presented for computation of LU factorization. Band matrices are used in many applications such as digital signal processing, power system analysis, finite element systems, and many more. In many of these applications, LU factorizations are needed to solve linear equations and calculation of a matrix determinant. Due to the large amount of data that needs to be computed and stored for this factorization, the goal of the proposed design tool is area minimization without compromising speed. Based on the number of zero elements and bandwidth, the design tool uses a High Level Synthesis to create the RTL code and testbench for these factorizations for the desired matrix. The proposed design tool reduces area, required memory location and chip to market time by generating a testbench and doing error analysis during RTL code generation. The generated RTL code is universal and can be used directly for any FPGA and VLSI platforms.