A new defect outline model used for critical area estimation in VLSI

The calculation of critical area is the main computational problem in yield estimation of VLSI. For efficient critical area calculation, it is usually assumed that defects related to photolithography all have the shape of a circular disc and only the diameter of the disc is used to characterize the size of an actual defect. The actual critical area of a real defect, however, is determined by its directional extensions that are usually not a constant. Then the available defect outline models will give rise to a large error in the critical area evaluation. In this paper, a more general framework is first developed to evaluate critical area where the actual defect extensions are estimated by a function rather than by a constant. Then a new defect outline model is presented to estimate the defect extensions by using the idea of piecewise linear interpolation. Subsequently the new defect outline model can be used to estimate the critical area of VLSI in a more accurate way. Finally, the new model is illustrated with the experimental results