A circuit for focal-plane image compression using vector quantization

Active pixel sensors are very suitable for the implementation of a large variety of image processing algorithms at the focal plane level. We propose a new focal plane image compression algorithm that is implemented with 607 transistors inside every 4×4 pixel block of a CMOS imager, using conventional 0.35 μm integration technology. We describe the theory of the proposed method, which is based on DPCM of the average block luminance and on VQ of four low-frequency components obtained by a linear transformation applied to the local pixels. We introduce the analog hardware of the pixel block and, to validate our design, present image coding results obtained from electrical Spice simulations of 64 pixel blocks.