Improved linearity CMOS differential structure using computational circuits

An original differential transconductance structure using exclusively MOS active devices biased in saturation region will be further presented. Performing the great advantage of a good linearity, obtained by a proper current biasing of the differential core using computational circuits, the proposed structure is designed for low-voltage low-power operation. The estimated linearity is obtained for an extended range of the differential input voltage. The frequency response of the new differential structure is strongly increased by operating all MOS devices in the saturation region. The circuit is implemented in 0.35μm CMOS technology, SPICE simulations confirming the theoretical estimated results.