Topology validation via simultaneous state & topology estimation with phasor data processing capability

This paper introduces a simultaneous state and topology estimation method able to process both conventional (SCADA) and synchrophasor measurements. It is devised to extract from the analog measurements not only estimates for the state variables, but also information concerning the underlying network topology. This can be accomplished by representing selected parts of the electrical network at bus section level, and by using a specialized, multiobjective optimization framework to formulate the joint estimation problem. The multiobjective criterion comprises both the familiar weighted least squares term and an additional least absolute value component that models switching branch statuses. The proposed approach can be seen as a validation step for the outcome produced by Network Processors, thereby preventing the occurrence of topology errors. The results presented in this paper show that the joint estimation approach can be extended to allow phasor measurement processing capability, and that the whole scheme can draw significant benefits from such an extension.