DocumentCode :
2676725
Title :
Estimating Area Efficiency of Antifuse based Channeled FPGA Architectures
Author :
Mehendale, Mahesh
Author_Institution :
Texas Instruments (India) Ltd.
fYear :
1993
fDate :
3-6 Jan 1993
Firstpage :
100
Lastpage :
103
Keywords :
Equations; Field programmable gate arrays; Instruments; Logic arrays; Logic design; Logic programming; Programmable logic arrays; Routing; Silicon; Traffic control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-3180-5
Type :
conf
DOI :
10.1109/ICVD.1993.669649
Filename :
669649
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2676725
بازگشت