Title :
Using run-time reconfiguration for fault injection in hardware prototypes
Author :
Antoni, Lörinc ; Leveugle, Régis ; Fehér, Béla
Author_Institution :
TIMA Lab., Grenoble, France
Abstract :
In this paper, approaches using run-time reconfiguration (RTR) for fault injection in programmable systems are introduced. In FPGA-based systems an important characteristic is the time to reconfigure the hardware. With novel FPGA families (e.g. Virtex, AT6000) it is possible to reconfigure the hardware partially in run-time. Important time-savings can be achieved when taking advantage of this characteristic for fault injection as only a small part of the device must be reconfigured
Keywords :
fault tolerant computing; hardware description languages; reconfigurable architectures; AT6000; FPGA-based systems; Virtex; fault injection; hardware prototypes; run-time reconfiguration; time-savings; Circuit faults; Circuit simulation; Electronic mail; Emulation; Hardware; Information systems; Laboratories; Power system modeling; Prototypes; Runtime;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2000. Proceedings. IEEE International Symposium on
Conference_Location :
Yamanashi
Print_ISBN :
0-7695-0719-0
DOI :
10.1109/DFTVS.2000.887181