DocumentCode
267717
Title
High performance MAC designs
Author
Eftaxiopoulos, N. ; Zervakis, G. ; Pekmestzi, K. ; Efstathiou, C.
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece
fYear
2014
fDate
16-18 Dec. 2014
Firstpage
30
Lastpage
35
Abstract
In this paper we propose two high performance multiplication-accumulation (MAC) designs. Targeting to operate at higher frequency, we investigate two different techniques based on the carry-save representation in order to reduce the delay impact of the accumulation process on the MAC operation. We conducted detailed experimental measurements to verify the advantages of the proposed MAC designs compared to two existing ones. Both the proposed designs operate at higher frequency without any losses in the area occupied or the power consumed.
Keywords
digital signal processing chips; integrated circuit design; MAC designs; carry-save representation; multiplication-accumulation designs; Adders; Arrays; Clocks; Delays; Encoding; Generators; Hybrid power systems; carry skip adder; carry-save representation; clock gating; high performance; multiplier-accumulator;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (IDT), 2014 9th International
Conference_Location
Algiers
Type
conf
DOI
10.1109/IDT.2014.7038582
Filename
7038582
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