DocumentCode :
2677174
Title :
A digitally controlled CMOS phase shifter with frequency doubling for multiple-antenna, direct-conversion transceiver systems
Author :
Tripurari, Karthik ; Banu, Mihai ; Kinget, Peter
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
fYear :
2011
fDate :
16-19 Jan. 2011
Firstpage :
239
Lastpage :
242
Abstract :
A digitally controlled frequency-doubling phase-shifter architecture is presented for the implementation of multiple-antenna GHz transceiver systems. It takes a 1.75 GHz input and produces two phase-shifted outputs at 3.5 GHz. It consists of a Delay Locked Loop (DLL) followed by symmetric XOR frequency doublers and phase interpolators. The phase shifter prototype in 90 nm standard CMOS has a phase shift range of 360° with a resolution of 22.5° and an INL <; 12° (<; 4° with external adjust), and consumes 55 mW from a 1 V supply.
Keywords :
antennas; delay lock loops; digital control; frequency multipliers; phase shifters; radio transceivers; delay locked loop; digitally controlled CMOS phase shifter; direct-conversion transceiver systems; frequency 1.75 GHz; frequency 3.5 GHz; frequency-doubling phase-shifter architecture; multiple-antenna transceiver systems; phase interpolators; power 55 mW; symmetric XOR frequency doublers; voltage 1 V; CMOS integrated circuits; Delay; Frequency measurement; Interpolation; Phase measurement; Phase shifters; Transceivers; DLL; Multiple Antenna Transceiver; Phase Interpolation; Phase Shifter; Symmetric Input XOR gate;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio and Wireless Symposium (RWS), 2011 IEEE
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-7687-9
Type :
conf
DOI :
10.1109/RWS.2011.5725463
Filename :
5725463
Link To Document :
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