DocumentCode :
267742
Title :
Enhanced bit-width optimization for linear circuits with feedbacks
Author :
Lamini, El-sedik ; Bellal, Rima ; Tagzout, Samir ; Belbachir, Hacene ; Belouchrani, Adel
Author_Institution :
RECITS Lab., USTHB, Algiers, Algeria
fYear :
2014
fDate :
16-18 Dec. 2014
Firstpage :
168
Lastpage :
173
Abstract :
Bit widths to accuracy trade offs require complex method development and testing. This paper presents a new process of incremental optimizations to get to reduced bit-widths compared to recently published results. Range and Precision improvements reach all the data path interconnections. More, a precision refinement is proposed even for input data. Detailed procedures and results of hardware implementations are provided to show the achieved improvements compared to existing optimization approaches. For illustration and to compare our work to existing results, different configurations of an IIR filter is used for tests and implementations. Depending on those different configurations, the proposed optimization techniques present an average of area reductions ranging from 17% to 30%.
Keywords :
IIR filters; circuit feedback; circuit optimisation; linear network synthesis; IIR filter; circuit feedback; data path interconnections; enhanced bit-width optimization; incremental optimization; linear circuits; precision improvement; range improvement; Benchmark testing; Equations; Mathematical model; Quantization (signal); Simulated annealing; Upper bound;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (IDT), 2014 9th International
Conference_Location :
Algiers
Type :
conf
DOI :
10.1109/IDT.2014.7038607
Filename :
7038607
Link To Document :
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