Title :
Compiler Assisted Dynamic Scheduling for Multicore Processors
Author :
Kiran, D.C. ; Radheshyam, B. ; Gurunarayanan, S. ; Misra, J.P.
Author_Institution :
Birla Inst. of Technol. & Sci., Pilani, India
Abstract :
In this paper, we propose a dynamic and efficient compiler based scheduling algorithm for multicore processors.Here, scheduler takes sub-blocks of a basic block which can be executed independently and maps these sub-blocks on to multiple cores to achieve less execution time. Instructions inside the sub-blocks are in Static-Single Assignment (SSA) form and have only true dependency, but all sub-blocks are disjoint. Scheduler is dynamic because, before mapping subblocks on to cores it checks the register requirement and cycles required for execution of each block and merges the sub-blocks if required which will lead to many outshoots. Despite having a number of new features, this algorithm has admissible time complexity, is economical in terms of the number of core used and is suitable for a wide range of graph structures.
Keywords :
computational complexity; multiprocessing systems; processor scheduling; program compilers; compiler assisted dynamic scheduling algorithm; multicore processors; static-single assignment form; time complexity; Dynamic scheduling; Multicore processing; Optimization; Parallel processing; Program processors; Registers; Schedules;
Conference_Titel :
Process Automation, Control and Computing (PACC), 2011 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-61284-765-8
DOI :
10.1109/PACC.2011.5978903