• DocumentCode
    2678724
  • Title

    FPGA-based SoC for real-time network intrusion detection using counting bloom filters

  • Author

    Harwayne-Gidansky, Jared ; Stefan, Deian ; Dalal, Ishaan

  • Author_Institution
    Center for Signal Process., Commun. & Comput. Eng. Res., Cooper Union for the Advancement of Sci. & Art, New York, NY, USA
  • fYear
    2009
  • fDate
    5-8 March 2009
  • Firstpage
    452
  • Lastpage
    458
  • Abstract
    Computers face an ever increasing number of threats from hackers, viruses and other malware; effective Network Intrusion Detection (NID) before a threat affects end-user machines is critical for both financial and national security. As the number of threats and network speeds increase (over 1 gigabit/sec), users of conventional software based NID methods must choose between protection or higher data rates. To address this shortcoming, we have designed a hardware-based NID system-on-a-chip using data structures called Counting Bloom Filters (CBFs). Our design has extremely high throughput (up to 3.3 gigabits/sec) and can successfully detect and mitigate known threats, and is, to our knowledge, the only known CBF based NID system-on-a-chip to be implemented on a Virtex 4 FPGA. In this project, we present the first optimized, Counting Bloom Filter based Network Intrusion Detection FPGA SoC (system-on-chip) implemented on a Virtex 4 FPGA: our design is scalable through further parallelization and, to our knowledge, is one of the highest throughput NID systems in existence.
  • Keywords
    field programmable gate arrays; logic design; optimisation; security of data; system-on-chip; CBF based NID; FPGA scalable parallelization design; FPGA-based SoC; NID system-on-a-chip; Virtex 4 FPGA; bit rate 1 Gbit/s; counting bloom filter optimisation; end-user machine; financial security; hacker threat; national security; real-time network intrusion detection; virus threat prevention; Computer hacking; Computer networks; Computer viruses; Face detection; Field programmable gate arrays; Filters; Intrusion detection; National security; System-on-a-chip; Throughput; Computer network security; Data structures; Field programmable gate arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Southeastcon, 2009. SOUTHEASTCON '09. IEEE
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    978-1-4244-3976-8
  • Electronic_ISBN
    978-1-4244-3978-2
  • Type

    conf

  • DOI
    10.1109/SECON.2009.5174096
  • Filename
    5174096