A spread-spectrum clock generator with dual-voltage controlled oscillator

Author

Xia, Tian ; Peng, Peng

Author_Institution

Sch. of Eng., Univ. of Vermont, Burlington, VT

fYear

2008

fDate

22-25 June 2008

Firstpage

1

Lastpage

4

Abstract

This paper proposes a spread spectrum clock generator (SSCG) for EMI reduction. The SSCG circuit utilizes a dual-voltage controlled oscillator based on the regular integer-N PLL. The circuit has been simulated in 0.18 mum CMOS technology. A 40 KHz triangular waveform is used for frequency modulation. The spectrum spread ratio ranges from 0.125% to 1%. The peak power reduction is 16 dB.

Keywords

CMOS integrated circuits; clocks; electromagnetic interference; frequency modulation; interference suppression; phase locked loops; timing circuits; voltage-controlled oscillators; EMI reduction; SSCG circuit; dual-voltage controlled oscillator; frequency 40 kHz; frequency modulation; peak power reduction; regular integer-N PLL; size 0.18 mum; spectrum spread ratio; spread-spectrum clock generator; triangular waveform; Charge pumps; Circuits; Clocks; Delay; Electromagnetic interference; Frequency modulation; Phase locked loops; Spread spectrum communication; Voltage control; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems and TAISA Conference, 2008. NEWCAS-TAISA 2008. 2008 Joint 6th International IEEE Northeast Workshop on

Conference_Location

Montreal, QC

Print_ISBN

978-1-4244-2331-6

Electronic_ISBN

978-1-4244-2332-3

Type

conf

DOI

10.1109/NEWCAS.2008.4606306

Filename

4606306