DocumentCode :
2678797
Title :
A 2 ns 1 Mb CMOS mask ROM
Author :
Lin, Jing-Min ; Ken, Mickey W D ; Tuan, Hsiao-Chin ; Kung, C.H. ; Liao, I-Chi ; Tseng, Kuo-Shu ; Lin, Jyh-Jong
Author_Institution :
Electron. Res. & Service Organ., Hsing-Chu, Taiwan
fYear :
1989
fDate :
17-19 May 1989
Firstpage :
36
Lastpage :
40
Abstract :
A description is given of a high-performance 1-Mb CMOS mask ROM with access time as fast as 29 ns. The fast access is achieved through bit line capacitance reduction, sensitive amplifier design, and the use of double-metal interconnection. Delta-I noise and the electrostatic discharge (ESD) susceptibility problem have been solved. The process and device, cell structure, peripheral circuits, and sense amplifier and output buffer are described
Keywords :
CMOS integrated circuits; integrated memory circuits; read-only storage; 1 Mbit; 29 ns; CMOS mask ROM; Delta-I noise; ESD susceptibility improvement; access time; bit line capacitance reduction; double-metal interconnection; electrostatic discharge; memory cell structure; output buffer; sense amplifier; sensitive amplifier design; CMOS technology; Capacitance; Clocks; Delay effects; Electrostatic discharge; Integrated circuit interconnections; MOS devices; MOSFETs; Power generation economics; Read only memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on
Conference_Location :
Taipei
Type :
conf
DOI :
10.1109/VTSA.1989.68577
Filename :
68577
Link To Document :
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