Abstract :
The following topics are dealt with: memory; delay test; manufacturing-aware optimizing power; formal verification; GPU programming; behavioral modeling; timing analysis; parallel embedded software; caches; digital print automation; high-level synthesis; sequential synthesis; NoC design; logic switch; nonvolatile memory; clock network synthesis; EDA; brain-inspired architectures; logic level synthesis; analog circuit sizing; system-level power management; asic and system-level communication synthesis.
Keywords :
cache storage; formal verification; graphics processing units; network synthesis; network-on-chip; parallel programming; random-access storage; GPU programming; NoC design; brain-inspired architectures; caches; delay test; formal verification; high-level synthesis; logic level synthesis; manufacturing-aware optimizing power; memory; parallel embedded software; sequential synthesis; system-level communication synthesis;
Conference_Titel :
Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4577-1399-6
Electronic_ISBN :
1092-3152
DOI :
10.1109/ICCAD.2011.6105288
