Title :
Routability-driven analytical placement for mixed-size circuit designs
Author :
Hsu, Meng-Kai ; Chou, Sheng ; Lin, Tzu-Hen ; Chang, Yao-Wen
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
Due to the significant mismatch between existing wirelength models and the congestion objective in placement, considering routability during placement is particularly significant for modern circuit designs. In this paper, a novel routability-driven analytical placement algorithm for large-scale mixed-size circuit designs is proposed. Unlike most existing works which usually optimize routability by reallocating whitespace or net-based congestion removal, the proposed algorithm optimizes routability from three major aspects: (1) Pin density: Most existing works optimize routability based on net distribution, while our work considers both the density of pins and their routing directions; (2) Routing overflow optimization: Unlike most previous works that use white space allocation or net-based congestion removal to improve routability, our work optimizes routing overflow by a novel sigmoid function during global placement; (3) Macro porosity consideration: A virtual macro expansion technique is applied to consider the constrained routing resource incurred by big macros. Routability-driven legalization and detailed placement are also proposed to further optimize routing congestion. Experimental results show the effectiveness and efficiency of our proposed algorithm. Compared with the participating teams for the 2011 ACM ISPD Routability-Driven Placement Contest, our algorithm achieves the best average overflow and routed wirelength.
Keywords :
circuit optimisation; integrated circuit design; mixed analogue-digital integrated circuits; large-scale mixed-size circuit designs; net-based congestion removal; pin density; routability-driven analytical placement algorithm; routability-driven legalization; routing congestion; routing overflow optimization; sigmoid function; virtual macroexpansion technique; white space allocation; Algorithm design and analysis; Circuit synthesis; Equations; Optimization; Pins; Resource management; Routing;
Conference_Titel :
Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4577-1399-6
Electronic_ISBN :
1092-3152
DOI :
10.1109/ICCAD.2011.6105309