DocumentCode :
2679299
Title :
Optimal statistical chip disposition
Author :
Zolotov, Vladimir ; Xiong, Jinjun
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2011
fDate :
7-10 Nov. 2011
Firstpage :
95
Lastpage :
102
Abstract :
A chip disposition criterion is used to decide whether to accept or discard a chip during chip testing. Its quality directly impacts both yield and product quality loss (PQL). The importance becomes even more significant with the increasingly large process variation. For the first time, this paper rigorously formulates the optimal chip disposition problem, and proposes an elegant solution. We show that the optimal chip disposition criterion is different from the existing industry practice. Our solution can find the optimal disposition criterion efficiently with better yield under the same PQL constraint, or lower PQL under the same yield constraint.
Keywords :
integrated circuit testing; PQL constraint; chip testing; optimal statistical chip disposition criterion; process variation; product quality loss; yield quality loss; Computational modeling; Correlation; Ring oscillators; Semiconductor device measurement; Timing; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Print_ISBN :
978-1-4577-1399-6
Electronic_ISBN :
1092-3152
Type :
conf
DOI :
10.1109/ICCAD.2011.6105312
Filename :
6105312
Link To Document :
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