DocumentCode
2679657
Title
Alternative design methodologies for the next generation logic switch
Author
Sacchetto, Davide ; De Marchi, Michele ; De Micheli, G. ; Leblebici, Yusuf
Author_Institution
Integrated Syst. Lab. (LSI), Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
fYear
2011
fDate
7-10 Nov. 2011
Firstpage
231
Lastpage
234
Abstract
Next generation logic switch devices are expected to rely on radically new technologies mainly due to the increasing difficulties and limitations of state-of-the-art CMOS switches, which, in turn, will also require innovative design methodologies that are distinctly different from those used for CMOS technologies. In this paper, three alternative emerging technologies are showcased in terms of their requirements for design implementation and in terms of potential advantages. First, a CMOS evolutionary approach based on vertically-stacked gate-all-around Si nanowire FETs is discussed. Next, an alternative design methodology based on ambipolar carbon nanotube FETs is presented. Finally, a novel approach based on the recently discovered memristive devices is presented, offering the possibility of combining memory and logic functions.
Keywords
CMOS integrated circuits; carbon nanotube field effect transistors; logic circuits; logic design; nanowires; silicon; CMOS switches; alternative design methodology; ambipolar carbon nanotube FET; field effect transistors; memristive devices; next generation logic switch; vertically-stacked gate-all-around Si nanowire FET; CNTFETs; Delay; Libraries; Logic gates; Resistance; Silicon; arithmetic blocks; cell library; logic synthesis; nanowire arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-4577-1399-6
Electronic_ISBN
1092-3152
Type
conf
DOI
10.1109/ICCAD.2011.6105331
Filename
6105331
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